Application specific design for digital beam-former (DBF)

Ahood Al Jneibi, Menatalla Abououf, Hani Saleh, Lilas Alrahis, Tasneem Assaf, Thanos Stouraitis

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

This paper aim at designing and implementing a Digital Beam-Former (DBF) using Verilog software. This paper presents a survey of DBF design, with intended solution to perform the design on VHSIC Hardware Description Language (VHDL). First, a Matlab simulation of the indented solution of DBF, is presented. Then, a Verilog language is built to design the solution of DBF, simulated using ModelSim, and synthesized using Synopsis tools. The synthesis was implemented using 65 nm technology and it reports a 324.9 μW when operating at 10 MHz. Hence, the DBF system is implemented to run under lower power constraints.

Original languageBritish English
Title of host publicationICECS 2017 - 24th IEEE International Conference on Electronics, Circuits and Systems
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages111-115
Number of pages5
ISBN (Electronic)9781538619117
DOIs
StatePublished - 14 Feb 2018
Event24th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2017 - Batumi, Georgia
Duration: 5 Dec 20178 Dec 2017

Publication series

NameICECS 2017 - 24th IEEE International Conference on Electronics, Circuits and Systems
Volume2018-January

Conference

Conference24th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2017
Country/TerritoryGeorgia
CityBatumi
Period5/12/178/12/17

Keywords

  • Digital Beam-former (DBF)
  • Digital Down Converter (DUC)
  • Digital-to Analog-Converter (DAC)
  • Matlab
  • VHDL

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