An FPGA accelerator for hash tree generation in the Merkle Signature Scheme

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

Merkle Signature Scheme relies on secure hash functions and is, therefore, assumed to be resistant to attacks by quantum computers. The generation of the Merkle public key, however, is highly time-consuming because of the huge number of hash operations required to set up a complete hash tree. Fortunately, setting up such trees features inherent parallelism, which may be utilized for accelerating this process using a specific hardware platform. This paper presents a flexible and efficient hardware architecture on an FPGA platform to accelerate the generation of Merkle hash trees. Timing measurements on a prototype with different parameters show a considerable performance boost compared to a similar software solution.

Original languageBritish English
Title of host publicationReconfigurable Computing
Subtitle of host publicationArchitectures, Tools and Applications - 6th International Symposium, ARC 2010, Proceedings
Pages145-156
Number of pages12
DOIs
StatePublished - 2010
Event6th International Symposium on Applied Reconfigurable Computing, ARC 2010 - Bangkok, Thailand
Duration: 17 Mar 201019 Mar 2010

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume5992 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

Conference6th International Symposium on Applied Reconfigurable Computing, ARC 2010
Country/TerritoryThailand
CityBangkok
Period17/03/1019/03/10

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