TY - GEN
T1 - An end-to-end RNS CNN Accelerator
AU - Sakellariou, Vasilis
AU - Paliouras, Vassilis
AU - Kouretas, Ioannis
AU - Saleh, Hani
AU - Stouraitis, Thanos
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - This work presents a Residue Numbering System (RNS)-based Convolutional Neural Network (CNN) accelerator. The proposed system is fully RNS-based, requiring no intermediate conversions to a binary representation. RNS operation overhead is minimized by designing the architecture in such a way that the usage of the non-trivial RNS operations is amortized over a large number of MAC operations. This allows to exploit their periodic usage and further reduce power consumption through clock-gating. Implementation results on a 22-nm process, show that RNS can not only increase the maximum achievable frequency of the arithmetic circuits, but also results in 58% more energy-efficient processing, compared to the traditional binary counterparts. Compared to the state-of-the-art, RNS-based CNN accelerator, the proposed architecture is shown to be 8.5× more energy efficient, with an average energy efficiency of 1.91 TOPS/W.
AB - This work presents a Residue Numbering System (RNS)-based Convolutional Neural Network (CNN) accelerator. The proposed system is fully RNS-based, requiring no intermediate conversions to a binary representation. RNS operation overhead is minimized by designing the architecture in such a way that the usage of the non-trivial RNS operations is amortized over a large number of MAC operations. This allows to exploit their periodic usage and further reduce power consumption through clock-gating. Implementation results on a 22-nm process, show that RNS can not only increase the maximum achievable frequency of the arithmetic circuits, but also results in 58% more energy-efficient processing, compared to the traditional binary counterparts. Compared to the state-of-the-art, RNS-based CNN accelerator, the proposed architecture is shown to be 8.5× more energy efficient, with an average energy efficiency of 1.91 TOPS/W.
UR - https://www.scopus.com/pages/publications/85199879234
U2 - 10.1109/AICAS59952.2024.10595885
DO - 10.1109/AICAS59952.2024.10595885
M3 - Conference contribution
AN - SCOPUS:85199879234
T3 - 2024 IEEE 6th International Conference on AI Circuits and Systems, AICAS 2024 - Proceedings
SP - 75
EP - 79
BT - 2024 IEEE 6th International Conference on AI Circuits and Systems, AICAS 2024 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 6th IEEE International Conference on AI Circuits and Systems, AICAS 2024
Y2 - 22 April 2024 through 25 April 2024
ER -