An efficient reliability evalu ation approach for system-level design of embedded systems

Adeel Israr, Abdulhadi Shoufan, Sorin A. Huss

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

A system-level design process of reliable systems demands efficient reliability evaluation of the explored design alternatives. This paper presents a new approach to accelerate the reliability evaluation and, thus, the design space exploration for reliable systems. A new data structure denoted as System Error Decision Diagram (SEDD) is proposed, which is based on both binary decision diagrams to model permanent errors and zero-suprressed decision diagrams to model transient errors. Both contructing the SEDD diagram and evaluating reliability based on it are detailed in an algorithmic way. The proposed approach is demonstrated for a control system taken from the automotive domain.

Original languageBritish English
Title of host publicationProceedings of the 10th International Symposium on Quality Electronic Design, ISQED 2009
Pages339-344
Number of pages6
DOIs
StatePublished - 2009
Event10th International Symposium on Quality Electronic Design, ISQED 2009 - San Jose, CA, United States
Duration: 16 Mar 200918 Mar 2009

Publication series

NameProceedings of the 10th International Symposium on Quality Electronic Design, ISQED 2009

Conference

Conference10th International Symposium on Quality Electronic Design, ISQED 2009
Country/TerritoryUnited States
CitySan Jose, CA
Period16/03/0918/03/09

Keywords

  • Embedded system
  • Permanent error
  • Reliability evaluation
  • System Error Decision Diagram
  • System-level design
  • Transient error

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