TY - JOUR
T1 - An Efficient Heterogeneous Memristive xnor for In-Memory Computing
AU - Abu Lebdeh, Muath
AU - Abunahla, Heba
AU - Mohammad, Baker
AU - Al-Qutayri, Mahmoud
N1 - Funding Information:
Manuscript received December 20, 2016; revised April 18, 2017 and May 3, 2017; accepted May 16, 2017. Date of current version August 28, 2017. This work was supported by the KUSTAR–KUIRF2 internal research fund under Grant 2014-210066). This paper was recommended by Associate Editor M. Alioto. (Corresponding author: Muath Abu Lebdeh.) The authors are with the Department of Electrical and Computer Engineering, Khalifa University, Abu Dhabi 127788, United Arab Emirates (e-mail: [email protected]; [email protected]; [email protected]; [email protected]).
Publisher Copyright:
© 2004-2012 IEEE.
PY - 2017/9
Y1 - 2017/9
N2 - Resistive RAM (RRAM) technologies are gaining importance due to their appealing characteristics, which include non-volatility, small form factor, low power consumption, and ability to perform logic operations in memory. These characteristics make RRAM highly suited for Internet of Things devices and similarly resource-constrained systems. This paper proposes a novel memristor-based xnor gate that enables the execution of xnor/xor function in the memristive crossbar memory. The proposed two-input xnor gate requires two steps to perform the xnor function. The design of the circuit utilizes bipolar and unipolar memristors and permits cascading by only adding an extra step and one computing memristor. To the best of our knowledge, this is the first native stateful xnor logic implementation. Spice simulations have been used to verify the functionality of the proposed circuit. This includes benchmarking the proposed design against the state-of-the-art stateful memristor-based logic circuits. The results for implementing three-input xor using the proposed circuit demonstrate efficient performance in terms of energy, latency, and area. The gate shows 56% saving in energy, 54% less number of steps (latency), and 50% less number of computing MR (area) compared with the state-of-the-art stateful xor/xnor implementations.
AB - Resistive RAM (RRAM) technologies are gaining importance due to their appealing characteristics, which include non-volatility, small form factor, low power consumption, and ability to perform logic operations in memory. These characteristics make RRAM highly suited for Internet of Things devices and similarly resource-constrained systems. This paper proposes a novel memristor-based xnor gate that enables the execution of xnor/xor function in the memristive crossbar memory. The proposed two-input xnor gate requires two steps to perform the xnor function. The design of the circuit utilizes bipolar and unipolar memristors and permits cascading by only adding an extra step and one computing memristor. To the best of our knowledge, this is the first native stateful xnor logic implementation. Spice simulations have been used to verify the functionality of the proposed circuit. This includes benchmarking the proposed design against the state-of-the-art stateful memristor-based logic circuits. The results for implementing three-input xor using the proposed circuit demonstrate efficient performance in terms of energy, latency, and area. The gate shows 56% saving in energy, 54% less number of steps (latency), and 50% less number of computing MR (area) compared with the state-of-the-art stateful xor/xnor implementations.
KW - heterogeneous memristive XNOR
KW - in-memory computing
KW - Memristor
KW - memristor based logic circuits
UR - http://www.scopus.com/inward/record.url?scp=85029108271&partnerID=8YFLogxK
U2 - 10.1109/TCSI.2017.2706299
DO - 10.1109/TCSI.2017.2706299
M3 - Article
AN - SCOPUS:85029108271
SN - 1057-7122
VL - 64
SP - 2427
EP - 2437
JO - IEEE Transactions on Circuits and Systems I: Regular Papers
JF - IEEE Transactions on Circuits and Systems I: Regular Papers
IS - 9
M1 - 8006295
ER -