An effective approach for associating the sources of defect signatures to process zones

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A semiconductor wafer undergoes various processing steps before it is transformed from a plain silicon wafer to one populated with thousands of integrated circuits. Each of these processing steps is susceptible to specific types of defects. Some defects may not be captured by in-line inspection tools or may not be sampled during defect review-scanning electron microscope and are carried over multiple processing steps. Such defects can be discovered at the end of the fabrication procedure, which requires process engineers to trace back the manufacturing processes that caused these defects. Despite the success of most current methods that detect defects during wafer fabrication, most of these methods are inable to accurately associate the source of an individual defect type to a specific semiconductor processing step. We believe that this limitation can be overcome by considering the carry-over of defect signatures rather than individual defects. We propose in this paper a system called step-defect contribution analyzer (SDCA) that detects defect signatures on semiconductor wafers and overcomes the limitations outlined above. SDCA allows process engineers to trace back and associate the source of a final defectivity discovered at the end of the fabrication procedure to specific defect signatures carried over multiple process zones. We experimentally evaluated the quality of SDCA by measuring its prediction accuracy. Results revealed marked prediction accuracy.

Original languageBritish English
Pages (from-to)176-184
Number of pages9
JournalIEEE Transactions on Semiconductor Manufacturing
Issue number2
StatePublished - May 2017


  • Defect signature
  • Semiconductor processing step
  • Semiconductor wafer fabrication
  • Wafer defect
  • Wafer map


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