Algorithmic foundations for hardware implementation of scale-insensitive MSER features

Andrzej Sluzek, Hani Saleh

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

The paper discusses algorithmic aspects of SIMSER feature detectors (SIMSERs are an efficient, multi-scale generalization of MSER features) targeting the prospective hardware implementation. In particular, it is shown that the architecture for SIMSER detection can be built over the existing architecture of MSER detection with a few modules added. The additional modules are: (1) image smoothing filter to generate the image in a sequence of scales, (2) replicas of the data memory (to handle results computed in a few neighboring scales) and (3) a module to combine data from the neighboring scales. The paper specifies the algorithmic structure of those additional modules, so that inexpensive hardware implementation of SIMSER detector on top of the exiting MSER hardware architecture becomes feasible.

Original languageBritish English
Title of host publication2016 IEEE 59th International Midwest Symposium on Circuits and Systems, MWSCAS 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509009169
DOIs
StatePublished - 2 Jul 2016
Event59th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2016 - Abu Dhabi, United Arab Emirates
Duration: 16 Oct 201619 Oct 2016

Publication series

NameMidwest Symposium on Circuits and Systems
Volume0
ISSN (Print)1548-3746

Conference

Conference59th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2016
Country/TerritoryUnited Arab Emirates
CityAbu Dhabi
Period16/10/1619/10/16

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