TY - GEN
T1 - A versatile hardware platform for the development and characterization of IoT sensor networks
AU - Muzaffar, Shahzad
AU - Elfadel, Ibrahim M.
N1 - Funding Information:
This work has been supported by the Semiconductor Research Corporation (SRC) under the Abu Dhabi-SRC Center of Excellence on Energy-Efficient Electronic Systems (ACE4S), with funding from the Mubadala Development Company, Abu Dhabi, UAE.
Publisher Copyright:
© 2016 IEEE.
PY - 2016/7/2
Y1 - 2016/7/2
N2 - We present an FPGA hardware platform for the prototyping and analysis of ultra-low power IoT sensor networks. The platform is meant to address the problem of evaluating network topology design options for IoT sensor communications using single-channel communication protocols. The network topologies include bus, star, ring, and tree topologies. This FPGAbased IoT network platform is based on three fundamental ingredients: A full HDL implementation of the ultra-low power TI MSP430 microcontroller, a novel ultra-low power single-wire communication protocol that does not require any clock and data recovery, and embedded C implementation of the transceivers within the TI MSP430 without any need for external hardware circuitry. In one of our bus network analysis, we have used the Virtex-7 FPGA environment to instantiate the TI MSP430 a number of times equal to the number of IoT sensors and used simple sensor ID's to implement high-Throughput, ultra-low power network communication between the IoT sensors using embedded C programs. Message collision is avoided using the built-in properties of the CDR-less protocol. The platform is flexible in that it allows the design, analysis and comparison of various networking graph topologies among the IoT sensors, including ones that contain gateways and hubs. The platform is also scalable in that the resources used for a two-sensor, point-Topoint communication link is less than 1% of the Virtex-7 available hardware.
AB - We present an FPGA hardware platform for the prototyping and analysis of ultra-low power IoT sensor networks. The platform is meant to address the problem of evaluating network topology design options for IoT sensor communications using single-channel communication protocols. The network topologies include bus, star, ring, and tree topologies. This FPGAbased IoT network platform is based on three fundamental ingredients: A full HDL implementation of the ultra-low power TI MSP430 microcontroller, a novel ultra-low power single-wire communication protocol that does not require any clock and data recovery, and embedded C implementation of the transceivers within the TI MSP430 without any need for external hardware circuitry. In one of our bus network analysis, we have used the Virtex-7 FPGA environment to instantiate the TI MSP430 a number of times equal to the number of IoT sensors and used simple sensor ID's to implement high-Throughput, ultra-low power network communication between the IoT sensors using embedded C programs. Message collision is avoided using the built-in properties of the CDR-less protocol. The platform is flexible in that it allows the design, analysis and comparison of various networking graph topologies among the IoT sensors, including ones that contain gateways and hubs. The platform is also scalable in that the resources used for a two-sensor, point-Topoint communication link is less than 1% of the Virtex-7 available hardware.
UR - http://www.scopus.com/inward/record.url?scp=85015835582&partnerID=8YFLogxK
U2 - 10.1109/MWSCAS.2016.7870141
DO - 10.1109/MWSCAS.2016.7870141
M3 - Conference contribution
AN - SCOPUS:85015835582
T3 - Midwest Symposium on Circuits and Systems
BT - 2016 IEEE 59th International Midwest Symposium on Circuits and Systems, MWSCAS 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 59th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2016
Y2 - 16 October 2016 through 19 October 2016
ER -