A Type-3 PLL for Single-Phase Applications

Abdullahi Bamigbade; Vinod Khadkikar; Mohamed Al Hosani

doi:10.1109/IAS.2019.8911942

A Type-3 PLL for Single-Phase Applications

Abdullahi Bamigbade, Vinod Khadkikar, Mohamed Al Hosani

Electrical Engineering

Abu Dhabi Distribution Company

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

4 Scopus citations

Abstract

Different structures of single-phase PLL have been widely developed for the synchronization of single-phase grid-connected power electronic-based equipments. These PLLs mostly employ proportional-integral (PI) controller as loop filter, thereby resulting in a type-2 control system. Hence, they are able to achieve zero steady-state phase error following step changes in frequency and phase of a single-phase input signal. However, when the input signal varies continuously over time in a linear manner, these PLLs exhibit a finite steady-state phase error. Thus, they may not be suitable for applications that require accurate estimation of phase angle when a ramp change in frequency occurs. To overcome this problem without compromising the benefits of type-2 PLLs, a type-3 PLL for single-phase applications is developed in this paper. Through experimental validation and comparison with an advanced single-phase type-2 PLL, the effectiveness of developed type-3 PLL is demonstrated.

Original language	British English
Title of host publication	2019 IEEE Industry Applications Society Annual Meeting, IAS 2019
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781538645390
DOIs	https://doi.org/10.1109/IAS.2019.8911942
State	Published - Sep 2019
Event	2019 IEEE Industry Applications Society Annual Meeting, IAS 2019 - Baltimore, United States Duration: 29 Sep 2019 → 3 Oct 2019

Publication series

Name	2019 IEEE Industry Applications Society Annual Meeting, IAS 2019

Conference

Conference	2019 IEEE Industry Applications Society Annual Meeting, IAS 2019
Country/Territory	United States
City	Baltimore
Period	29/09/19 → 3/10/19

Keywords

disturbance rejection capability
gain cross-over frequency
loop filter
Phase locked-loop (PLL)
phase margin
steady-state error

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10.1109/IAS.2019.8911942

Cite this

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title = "A Type-3 PLL for Single-Phase Applications",

abstract = "Different structures of single-phase PLL have been widely developed for the synchronization of single-phase grid-connected power electronic-based equipments. These PLLs mostly employ proportional-integral (PI) controller as loop filter, thereby resulting in a type-2 control system. Hence, they are able to achieve zero steady-state phase error following step changes in frequency and phase of a single-phase input signal. However, when the input signal varies continuously over time in a linear manner, these PLLs exhibit a finite steady-state phase error. Thus, they may not be suitable for applications that require accurate estimation of phase angle when a ramp change in frequency occurs. To overcome this problem without compromising the benefits of type-2 PLLs, a type-3 PLL for single-phase applications is developed in this paper. Through experimental validation and comparison with an advanced single-phase type-2 PLL, the effectiveness of developed type-3 PLL is demonstrated.",

keywords = "disturbance rejection capability, gain cross-over frequency, loop filter, Phase locked-loop (PLL), phase margin, steady-state error",

author = "Abdullahi Bamigbade and Vinod Khadkikar and Hosani, {Mohamed Al}",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 2019 IEEE Industry Applications Society Annual Meeting, IAS 2019 ; Conference date: 29-09-2019 Through 03-10-2019",

year = "2019",

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doi = "10.1109/IAS.2019.8911942",

language = "British English",

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Bamigbade, A, Khadkikar, V & Hosani, MA 2019, A Type-3 PLL for Single-Phase Applications. in 2019 IEEE Industry Applications Society Annual Meeting, IAS 2019., 8911942, 2019 IEEE Industry Applications Society Annual Meeting, IAS 2019, Institute of Electrical and Electronics Engineers Inc., 2019 IEEE Industry Applications Society Annual Meeting, IAS 2019, Baltimore, United States, 29/09/19. https://doi.org/10.1109/IAS.2019.8911942

A Type-3 PLL for Single-Phase Applications. / Bamigbade, Abdullahi; Khadkikar, Vinod; Hosani, Mohamed Al.
2019 IEEE Industry Applications Society Annual Meeting, IAS 2019. Institute of Electrical and Electronics Engineers Inc., 2019. 8911942 (2019 IEEE Industry Applications Society Annual Meeting, IAS 2019).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A Type-3 PLL for Single-Phase Applications

AU - Bamigbade, Abdullahi

AU - Khadkikar, Vinod

AU - Hosani, Mohamed Al

PY - 2019/9

Y1 - 2019/9

N2 - Different structures of single-phase PLL have been widely developed for the synchronization of single-phase grid-connected power electronic-based equipments. These PLLs mostly employ proportional-integral (PI) controller as loop filter, thereby resulting in a type-2 control system. Hence, they are able to achieve zero steady-state phase error following step changes in frequency and phase of a single-phase input signal. However, when the input signal varies continuously over time in a linear manner, these PLLs exhibit a finite steady-state phase error. Thus, they may not be suitable for applications that require accurate estimation of phase angle when a ramp change in frequency occurs. To overcome this problem without compromising the benefits of type-2 PLLs, a type-3 PLL for single-phase applications is developed in this paper. Through experimental validation and comparison with an advanced single-phase type-2 PLL, the effectiveness of developed type-3 PLL is demonstrated.

AB - Different structures of single-phase PLL have been widely developed for the synchronization of single-phase grid-connected power electronic-based equipments. These PLLs mostly employ proportional-integral (PI) controller as loop filter, thereby resulting in a type-2 control system. Hence, they are able to achieve zero steady-state phase error following step changes in frequency and phase of a single-phase input signal. However, when the input signal varies continuously over time in a linear manner, these PLLs exhibit a finite steady-state phase error. Thus, they may not be suitable for applications that require accurate estimation of phase angle when a ramp change in frequency occurs. To overcome this problem without compromising the benefits of type-2 PLLs, a type-3 PLL for single-phase applications is developed in this paper. Through experimental validation and comparison with an advanced single-phase type-2 PLL, the effectiveness of developed type-3 PLL is demonstrated.

KW - disturbance rejection capability

KW - gain cross-over frequency

KW - loop filter

KW - Phase locked-loop (PLL)

KW - phase margin

KW - steady-state error

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M3 - Conference contribution

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BT - 2019 IEEE Industry Applications Society Annual Meeting, IAS 2019

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Y2 - 29 September 2019 through 3 October 2019

ER -

A Type-3 PLL for Single-Phase Applications

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Keywords

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