A test method and DFT structure for analog modules in mixed-signal circuits

This paper outlines the difficulties associated with testing analog circuits in general and those residing within mixed-signal circuits in particular. It proposes a system level oriented tested method based on the excitation of the circuit-under-test with a pseudo random binary sequence and the subsequent analysis of the captured response. The fault detection capabilities of the test and data analysis methods are demonstrated by simulation results. The effect of the test sequence length on fault detection is studied. It also discusses a design for testability structure that can be incorporated in a mixed-signal chip to enable the testing of the analog circuit blocks.