A sub-μW bio-potential front end in 65nm CMOS

Yonatan Kifle, Hani Saleh, Baker Mohammad, Mohammed Ismail

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

A bio-potential amplifier intended for continuous monitoring of vitals characterized by its long operational lifetime is required to operate at the lowest power budget possible. Moreover, a compact active area directly related to portability is essential. This paper presents a 0.55pW auto gain controlled biopotential amplifier implemented in 65nm 1P7M CMOS for ECG signal classifier SoC. A chopper-stabilized amplifier is designed at 0.6V supply voltage to mitigate the DC offset and near DC flicker noise. The input ECG signal level is further set by the four gain levels of the variable gain amplifier (VGA) to provide maximum swing to the ADC. The whole system is integrated into a core are of 0.10mm 2 and can operate at a wide range of 0.6-1.2V supply voltage.

Original languageBritish English
Title of host publication25th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017 - Proceedings
PublisherIEEE Computer Society
ISBN (Electronic)9781538628805
DOIs
StatePublished - 13 Dec 2017
Event25th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017 - Abu Dhabi, United Arab Emirates
Duration: 23 Oct 201725 Oct 2017

Publication series

NameIEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC
ISSN (Print)2324-8432
ISSN (Electronic)2324-8440

Conference

Conference25th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017
Country/TerritoryUnited Arab Emirates
CityAbu Dhabi
Period23/10/1725/10/17

Keywords

  • Analog front end
  • Bio-potential amplifier and chopper stabilized amplifier

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