A platform for visualizing digital circuit synthesis with VHDL

Abdulhadi Shoufan, Zheng Lu, Guido Rößling

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

This paper presents the VISUAL-VHDL platform for visualizing digital circuit synthesis based on the hardware description language VHDL. VISUAL-VHDL enables students to enter VHDL code and control an animation process, which shows step-by-step how the different language constructs are treated to synthesize a complete digital circuit. It also enables the visualization of the Quine-McCluskey algorithm, which is embedded in our tool to optimize the circuit resulting from synthesizing the VHDL code. The drag and drop schematic editor for entering and parameterizing digital circuits can be used by educators and students to effectively produce circuit diagrams.

Original languageBritish English
Title of host publicationITiCSE'10 - Proceedings of the 2010 ACM SIGCSE Annual Conference on Innovation and Technology in Computer Science Education
Pages294-298
Number of pages5
DOIs
StatePublished - 2010
Event15th Innovation and Technology in Computer Science Education Conference, ITiCSE 2010 - Bilkent, Ankara, Turkey
Duration: 26 Jun 201030 Jun 2010

Publication series

NameITiCSE'10 - Proceedings of the 2010 ACM SIGCSE Annual Conference on Innovation and Technology in Computer Science Education

Conference

Conference15th Innovation and Technology in Computer Science Education Conference, ITiCSE 2010
Country/TerritoryTurkey
CityBilkent, Ankara
Period26/06/1030/06/10

Keywords

  • Animation
  • Digital circuit synthesis
  • VHDL
  • Visualization

Fingerprint

Dive into the research topics of 'A platform for visualizing digital circuit synthesis with VHDL'. Together they form a unique fingerprint.

Cite this