A novel processor architecture for McEliece cryptosystem and FPGA platforms

Abdulhadi Shoufan; Thorsten Winky; Gregor Molterz; Sorin Hussz; Falko Strentzkex

doi:10.1109/ASAP.2009.29

A novel processor architecture for McEliece cryptosystem and FPGA platforms

Abdulhadi Shoufan, Thorsten Winky, Gregor Molterz, Sorin Hussz, Falko Strentzkex

Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

26 Scopus citations

Abstract

McEliece scheme represents a code-based public-key cryptosystem. So far, this cryptosystem was not employed because of efficiency questions regarding performance and communication overhead. This paper presents a novel processor architecture as a high-performance platform to execute key generation, encryption and decryption according to this cryptosystem. A prototype of this processor is realized on Virtex-5 FPGA and tested via a software API. A comparison with a similar software solution highlights the performance advantage of the proposed hardware solution.

Original language	British English
Title of host publication	Proceedings - 2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2009
Pages	98-105
Number of pages	8
DOIs	https://doi.org/10.1109/ASAP.2009.29
State	Published - 2009
Event	2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2009 - Boston, MA, United States Duration: 7 Jul 2009 → 9 Jul 2009

Publication series

Name	Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors
ISSN (Print)	1063-6862

Conference

Conference	2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2009
Country/Territory	United States
City	Boston, MA
Period	7/07/09 → 9/07/09

Keywords

Cryptography hardware and implementation
Cryptoprocessor
FPGA
Goppa code
McEliece cryptosystem

Access to Document

10.1109/ASAP.2009.29

Cite this

Shoufan, A., Winky, T., Molterz, G., Hussz, S., & Strentzkex, F. (2009). A novel processor architecture for McEliece cryptosystem and FPGA platforms. In Proceedings - 2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2009 (pp. 98-105). Article 5200016 (Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors). https://doi.org/10.1109/ASAP.2009.29

Shoufan, Abdulhadi ; Winky, Thorsten ; Molterz, Gregor et al. / A novel processor architecture for McEliece cryptosystem and FPGA platforms. Proceedings - 2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2009. 2009. pp. 98-105 (Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors).

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title = "A novel processor architecture for McEliece cryptosystem and FPGA platforms",

abstract = "McEliece scheme represents a code-based public-key cryptosystem. So far, this cryptosystem was not employed because of efficiency questions regarding performance and communication overhead. This paper presents a novel processor architecture as a high-performance platform to execute key generation, encryption and decryption according to this cryptosystem. A prototype of this processor is realized on Virtex-5 FPGA and tested via a software API. A comparison with a similar software solution highlights the performance advantage of the proposed hardware solution.",

keywords = "Cryptography hardware and implementation, Cryptoprocessor, FPGA, Goppa code, McEliece cryptosystem",

author = "Abdulhadi Shoufan and Thorsten Winky and Gregor Molterz and Sorin Hussz and Falko Strentzkex",

year = "2009",

doi = "10.1109/ASAP.2009.29",

language = "British English",

isbn = "9780769537320",

series = "Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors",

pages = "98--105",

booktitle = "Proceedings - 2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2009",

note = "2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2009 ; Conference date: 07-07-2009 Through 09-07-2009",

}

Shoufan, A, Winky, T, Molterz, G, Hussz, S & Strentzkex, F 2009, A novel processor architecture for McEliece cryptosystem and FPGA platforms. in Proceedings - 2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2009., 5200016, Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors, pp. 98-105, 2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2009, Boston, MA, United States, 7/07/09. https://doi.org/10.1109/ASAP.2009.29

A novel processor architecture for McEliece cryptosystem and FPGA platforms. / Shoufan, Abdulhadi; Winky, Thorsten; Molterz, Gregor et al.
Proceedings - 2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2009. 2009. p. 98-105 5200016 (Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - McEliece scheme represents a code-based public-key cryptosystem. So far, this cryptosystem was not employed because of efficiency questions regarding performance and communication overhead. This paper presents a novel processor architecture as a high-performance platform to execute key generation, encryption and decryption according to this cryptosystem. A prototype of this processor is realized on Virtex-5 FPGA and tested via a software API. A comparison with a similar software solution highlights the performance advantage of the proposed hardware solution.

AB - McEliece scheme represents a code-based public-key cryptosystem. So far, this cryptosystem was not employed because of efficiency questions regarding performance and communication overhead. This paper presents a novel processor architecture as a high-performance platform to execute key generation, encryption and decryption according to this cryptosystem. A prototype of this processor is realized on Virtex-5 FPGA and tested via a software API. A comparison with a similar software solution highlights the performance advantage of the proposed hardware solution.

KW - Cryptography hardware and implementation

KW - Cryptoprocessor

KW - FPGA

KW - Goppa code

KW - McEliece cryptosystem

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M3 - Conference contribution

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Shoufan A, Winky T, Molterz G, Hussz S, Strentzkex F. A novel processor architecture for McEliece cryptosystem and FPGA platforms. In Proceedings - 2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2009. 2009. p. 98-105. 5200016. (Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors). doi: 10.1109/ASAP.2009.29

A novel processor architecture for McEliece cryptosystem and FPGA platforms

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Keywords

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