A multiconductor transmission line methodology for global on-chip interconnect modeling and analysis

I. M.Abe Elfadel; Alina Deutsch; Howard H. Smith; Barry J. Rubin; Gerard V. Kopcsay

doi:10.1109/TADVP.2004.825478

A multiconductor transmission line methodology for global on-chip interconnect modeling and analysis

I. M.Abe Elfadel, Alina Deutsch, Howard H. Smith, Barry J. Rubin, Gerard V. Kopcsay

Electrical Engineering

Research output: Contribution to journal › Article › peer-review

9 Scopus citations

Abstract

This paper describes a methodology for global on-chip interconnect modeling and analysis using frequency-dependent multiconductor transmission lines. The methodology allows designers to contain the complexity of series impedance computation by transforming the generic inductance and resistance extraction problem into one of per-unit-length parameter extraction. This methodology has been embodied in a CAD tool that is now in production use by interconnect designers and complementary metal oxide semiconductor (CMOS) process technologists.

Original language	British English
Pages (from-to)	71-78
Number of pages	8
Journal	IEEE Transactions on Advanced Packaging
Volume	27
Issue number	1
DOIs	https://doi.org/10.1109/TADVP.2004.825478
State	Published - Feb 2004

Keywords

CAD tool
CMOS
Frequency-dependent multiconductor transmission lines
On-chip interconnect modeling

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10.1109/TADVP.2004.825478

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A multiconductor transmission line methodology for global on-chip interconnect modeling and analysis

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Keywords

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