A high-throughput, contention-free low-power, Radix-2 1k,2k, 4k and 8k-point fast fourier transform engine using 28nm standard-cell process

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Abstract

This paper presents a high-throughput, contention-free, low-power, Radix-2 decimation in frequency fast Fourier transform core implemented in 28nm industry representative standard-cell process. It utilizes an algorithm to eliminate memory access contention and maximize throughput by eliminating bubbles in the butterfly's pipeline. The implementation of the FFT core is presented, including timing and place-and-route result in 28nm standard CMOS process. The FFT core can perform 1024, 2048, 4096 and 8192 points FFT. The FFT core uses two-port SRAM elements and achieves a throughput of 2-butterfly operations every clock cycle. The FFT core performs 8K-points FFT in around 40uS.

Original languageBritish English
Title of host publicationProceedings of the 2013 8th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2013
Pages184-185
Number of pages2
DOIs
StatePublished - 2013
Event2013 8th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2013 - Abu Dhabi, United Arab Emirates
Duration: 26 Mar 201328 Mar 2013

Publication series

NameProceedings of the 2013 8th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2013

Conference

Conference2013 8th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2013
Country/TerritoryUnited Arab Emirates
CityAbu Dhabi
Period26/03/1328/03/13

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