A fault attack countermeasure for ECC processor using One-Hot RSD encoding

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4 Scopus citations

Abstract

Fault attacks are considered major threat to hardware implementations of cryptographic algorithms. A number of known fault injection attacks against Elliptic Curve Cryptography (ECC) processors exist in the literature. In this paper, we propose a gate level technique to harden the resiliency of an ECC processor against fault attacks. Our technique is specific to integer based arithmetic. The proposed hardening technique is built over the Redundant Signed Digit (RSD) as a carry free arithmetic using One Hot Encoding (OHE) with the introduction of competitive overhead of around 35%. The hardened processor has been implemented in Xilinx Virtex-5 FPGA and was verified against different fault models.

Original languageBritish English
Title of host publication2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages307-310
Number of pages4
ISBN (Electronic)9781479942428
DOIs
StatePublished - 25 Feb 2015
Event2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014 - Marseille, France
Duration: 7 Dec 201410 Dec 2014

Publication series

Name2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014

Conference

Conference2014 21st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2014
Country/TerritoryFrance
CityMarseille
Period7/12/1410/12/14

Keywords

  • Elliptic Curve Cryptography
  • FPGA
  • One Hot Encoding
  • Redundant Signed Digit

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