TY - JOUR
T1 - A dual-output switched capacitor DC-DC buck converter using adaptive time multiplexing technique in 65-nm CMOS
AU - Kilani, Dima
AU - Mohammad, Baker
AU - Alhawari, Mohammad
AU - Saleh, Hani
AU - Ismail, Mohammed
N1 - Funding Information:
Manuscript received April 25, 2018; revised June 25, 2018; accepted July 9, 2018. Date of publication August 22, 2018; date of current version October 2, 2018. This work was supported by the Mubadala-SRC Center of Excellence for Energy Efficient Electronic Systems Research under Contract 2013-HJ2440. This paper was recommended by Associate Editor F. Neri. (Corresponding author: Dima Kilani.) The authors are with the Electrical and Computer Engineering Department, Khalifa University, Abu Dhabi 127788, United Arab Emirates (e-mail: [email protected]).
Publisher Copyright:
© 2018 IEEE.
PY - 2018/11
Y1 - 2018/11
N2 - This paper presents an area- A nd power-efficient dual-output switched capacitor (DOSC) dc-dc buck converter for wearable biomedical devices. The DOSC converter has an input voltage range between 1.05 and 1.4 V and generates two simultaneous regulated output voltages of 1 and 0.55 V. The DOSC consists of two main blocks: A switched capacitor regulator and an adaptive time multiplexing (ATM) controller. The switched capacitor regulator generates a single regulated voltage using pulse frequency modulation based on a predetermined reference voltage. In addition, the ATM controller generates two simultaneous output voltages and eliminates the reverse current using pulse width modulation during the switching between the output voltages. Addressing the reverse current problem is important to reduce the output voltage droop and improve the performance. The proposed converter supports load currents of 10-350 μ A and 1-10 μ A at load voltages of 1 and 0.55 V, respectively. The DOSC circuit is fabricated in 65-nm CMOS, and it occupies an active area of 0.27 mm2. Measured results show that a peak efficiency of 78% is achieved at a load power of 300~ μ W.
AB - This paper presents an area- A nd power-efficient dual-output switched capacitor (DOSC) dc-dc buck converter for wearable biomedical devices. The DOSC converter has an input voltage range between 1.05 and 1.4 V and generates two simultaneous regulated output voltages of 1 and 0.55 V. The DOSC consists of two main blocks: A switched capacitor regulator and an adaptive time multiplexing (ATM) controller. The switched capacitor regulator generates a single regulated voltage using pulse frequency modulation based on a predetermined reference voltage. In addition, the ATM controller generates two simultaneous output voltages and eliminates the reverse current using pulse width modulation during the switching between the output voltages. Addressing the reverse current problem is important to reduce the output voltage droop and improve the performance. The proposed converter supports load currents of 10-350 μ A and 1-10 μ A at load voltages of 1 and 0.55 V, respectively. The DOSC circuit is fabricated in 65-nm CMOS, and it occupies an active area of 0.27 mm2. Measured results show that a peak efficiency of 78% is achieved at a load power of 300~ μ W.
KW - dual-output switched capacitor DC-DC buck converter
KW - multiple output voltage levels
KW - power efficiency
KW - Power management unit
UR - http://www.scopus.com/inward/record.url?scp=85052695245&partnerID=8YFLogxK
U2 - 10.1109/TCSI.2018.2857204
DO - 10.1109/TCSI.2018.2857204
M3 - Article
AN - SCOPUS:85052695245
SN - 1057-7122
VL - 65
SP - 4007
EP - 4016
JO - IEEE Transactions on Circuits and Systems I: Regular Papers
JF - IEEE Transactions on Circuits and Systems I: Regular Papers
IS - 11
M1 - 8444059
ER -