A computational technique and a VLSI architecture for digital pulse shaping in OFDM modems

E. Fotopoulou; V. Paliouras; T. Stouraitis

A computational technique and a VLSI architecture for digital pulse shaping in OFDM modems

E. Fotopoulou, V. Paliouras, T. Stouraitis

Electrical Engineering

University of Patras

Research output: Contribution to journal › Conference article › peer-review

3 Scopus citations

Abstract

This paper introduces an efficient computational technique for Orthogonal Frequency Division Multiplexing (OFDM) design with digital pulse shaping filters and discusses the corresponding VLSI architecture issues. In the proposed architecture a 64-point, radix-4 pipelined FFT is implemented in combination with a parallel digital pulse shaping filter architecture. By exploiting the redundancy in to the cyclic prefix part of the OFDM symbol, a significant 20% reduction of the required arithmetic operations is accomplished.

Original language	British English
Pages (from-to)	II125-II128
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	2
State	Published - 2003
Event	Proceedings of the 2003 IEEE International Symposium on Circuits and Systems - Bangkok, Thailand Duration: 25 May 2003 → 28 May 2003

Cite this

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title = "A computational technique and a VLSI architecture for digital pulse shaping in OFDM modems",

abstract = "This paper introduces an efficient computational technique for Orthogonal Frequency Division Multiplexing (OFDM) design with digital pulse shaping filters and discusses the corresponding VLSI architecture issues. In the proposed architecture a 64-point, radix-4 pipelined FFT is implemented in combination with a parallel digital pulse shaping filter architecture. By exploiting the redundancy in to the cyclic prefix part of the OFDM symbol, a significant 20% reduction of the required arithmetic operations is accomplished.",

author = "E. Fotopoulou and V. Paliouras and T. Stouraitis",

year = "2003",

language = "British English",

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journal = "Proceedings - IEEE International Symposium on Circuits and Systems",

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note = "Proceedings of the 2003 IEEE International Symposium on Circuits and Systems ; Conference date: 25-05-2003 Through 28-05-2003",

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T1 - A computational technique and a VLSI architecture for digital pulse shaping in OFDM modems

AU - Fotopoulou, E.

AU - Paliouras, V.

AU - Stouraitis, T.

PY - 2003

Y1 - 2003

N2 - This paper introduces an efficient computational technique for Orthogonal Frequency Division Multiplexing (OFDM) design with digital pulse shaping filters and discusses the corresponding VLSI architecture issues. In the proposed architecture a 64-point, radix-4 pipelined FFT is implemented in combination with a parallel digital pulse shaping filter architecture. By exploiting the redundancy in to the cyclic prefix part of the OFDM symbol, a significant 20% reduction of the required arithmetic operations is accomplished.

AB - This paper introduces an efficient computational technique for Orthogonal Frequency Division Multiplexing (OFDM) design with digital pulse shaping filters and discusses the corresponding VLSI architecture issues. In the proposed architecture a 64-point, radix-4 pipelined FFT is implemented in combination with a parallel digital pulse shaping filter architecture. By exploiting the redundancy in to the cyclic prefix part of the OFDM symbol, a significant 20% reduction of the required arithmetic operations is accomplished.

UR - http://www.scopus.com/inward/record.url?scp=0038084290&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:0038084290

SN - 0271-4310

VL - 2

SP - II125-II128

JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

T2 - Proceedings of the 2003 IEEE International Symposium on Circuits and Systems

Y2 - 25 May 2003 through 28 May 2003

ER -

A computational technique and a VLSI architecture for digital pulse shaping in OFDM modems

Abstract

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