A 28 GHz Inverse Class-D Power Amplifier

Nourhan Elsayed, Hani Saleh, Baker Mohammad, Mohammed Ismail, Mihai Sanduleanu

Research output: Chapter in Book/Report/Conference proceedingChapterpeer-review


This chapter presents design, simulation, and measurements of a current mode/inverse Class-D (CMCD) PA at 28 GHz utilizing Global Foundries’ 22 nm FDSOI technology. In order to overcome the breakdown voltage of the devices, increase efficiency, and deliver more output power, the implemented PA utilizes the cascode (stacking) topology. Pulse injection from the input transistor into the stacked transistor in order to minimize the output capacitance and achieve higher efficiency. This chapter is organized as follows: Sect. 6.1 discusses the principle of operation of the classical CMCD, and Sect. 6.2 presents the design methodology of the proposed CMCD and introduces the concept of utilizing a cascode topology along with pulse injection. Section 6.3 discusses measurement results and comparison to the state-of-the-art CMCD PAs and Sect. 6.4 concludes the chapter.

Original languageBritish English
Title of host publicationAnalog Circuits and Signal Processing
Number of pages10
StatePublished - 2022

Publication series

NameAnalog Circuits and Signal Processing
ISSN (Print)1872-082X
ISSN (Electronic)2197-1854


  • Class-D
  • Current mode Class-D
  • Differential PA
  • Drain efficiency
  • Inverse Class-D
  • Pulse injection


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