A 28-GHz cascode inverse class-D power amplifier utilizing pulse injection in 22-nm FDSOI

Nourhan Elsayed; Hani Saleh; Baker Mohammad; Mihai Sanduleanu

doi:10.1109/ACCESS.2020.2996907

A 28-GHz cascode inverse class-D power amplifier utilizing pulse injection in 22-nm FDSOI

Nourhan Elsayed, Hani Saleh, Baker Mohammad, Mihai Sanduleanu

Electrical Engineering

Research output: Contribution to journal › Article › peer-review

6 Scopus citations

Abstract

Current Mode Class-D (CMCD) Power Amplifiers are of particular interest in outphasing transmitters or Doherty configuration. This is because the output capacitance can be absorbed in the RLC output matching network and 100% theoretical efficiency. In this paper, a 28 GHz current mode (inverse) Class-D power amplifier was simulated, implemented, and measured in 22nm FDSOI. In order to overcome the breakdown voltages of the devices, the amplifier employs a stacked topology, which enables higher output powers and efficiency. The stacked transistors are also pulse injected to further increase the efficiency. Measurement results shows a peak PAE of 46%, peak drain efficiency (DE) of 71% and a saturated output power of 19 dBm. The implemented CMCD PA reports the best performance in literature compared to other CMOS based CMCD PAs.

Original language	British English
Article number	9098930
Pages (from-to)	97353-97360
Number of pages	8
Journal	IEEE Access
Volume	8
DOIs	https://doi.org/10.1109/ACCESS.2020.2996907
State	Published - 2020

Keywords

Current mode class-D
FDSOI CMOS
high efficiency
power added efficiency (PAE)
power amplifier (PA)
stacking

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10.1109/ACCESS.2020.2996907

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title = "A 28-GHz cascode inverse class-D power amplifier utilizing pulse injection in 22-nm FDSOI",

abstract = "Current Mode Class-D (CMCD) Power Amplifiers are of particular interest in outphasing transmitters or Doherty configuration. This is because the output capacitance can be absorbed in the RLC output matching network and 100% theoretical efficiency. In this paper, a 28 GHz current mode (inverse) Class-D power amplifier was simulated, implemented, and measured in 22nm FDSOI. In order to overcome the breakdown voltages of the devices, the amplifier employs a stacked topology, which enables higher output powers and efficiency. The stacked transistors are also pulse injected to further increase the efficiency. Measurement results shows a peak PAE of 46%, peak drain efficiency (DE) of 71% and a saturated output power of 19 dBm. The implemented CMCD PA reports the best performance in literature compared to other CMOS based CMCD PAs.",

keywords = "Current mode class-D, FDSOI CMOS, high efficiency, power added efficiency (PAE), power amplifier (PA), stacking",

author = "Nourhan Elsayed and Hani Saleh and Baker Mohammad and Mihai Sanduleanu",

note = "Funding Information: This work was supported in part by GLOBAL FOUNDRIES and SRC under Grant 2016-LM2716, and in part by the Khalifa University through the SOC Center under Award RC2-2018-020. Publisher Copyright: {\textcopyright} 2013 IEEE.",

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doi = "10.1109/ACCESS.2020.2996907",

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AU - Elsayed, Nourhan

AU - Saleh, Hani

AU - Mohammad, Baker

AU - Sanduleanu, Mihai

N1 - Funding Information: This work was supported in part by GLOBAL FOUNDRIES and SRC under Grant 2016-LM2716, and in part by the Khalifa University through the SOC Center under Award RC2-2018-020. Publisher Copyright: © 2013 IEEE.

PY - 2020

Y1 - 2020

N2 - Current Mode Class-D (CMCD) Power Amplifiers are of particular interest in outphasing transmitters or Doherty configuration. This is because the output capacitance can be absorbed in the RLC output matching network and 100% theoretical efficiency. In this paper, a 28 GHz current mode (inverse) Class-D power amplifier was simulated, implemented, and measured in 22nm FDSOI. In order to overcome the breakdown voltages of the devices, the amplifier employs a stacked topology, which enables higher output powers and efficiency. The stacked transistors are also pulse injected to further increase the efficiency. Measurement results shows a peak PAE of 46%, peak drain efficiency (DE) of 71% and a saturated output power of 19 dBm. The implemented CMCD PA reports the best performance in literature compared to other CMOS based CMCD PAs.

AB - Current Mode Class-D (CMCD) Power Amplifiers are of particular interest in outphasing transmitters or Doherty configuration. This is because the output capacitance can be absorbed in the RLC output matching network and 100% theoretical efficiency. In this paper, a 28 GHz current mode (inverse) Class-D power amplifier was simulated, implemented, and measured in 22nm FDSOI. In order to overcome the breakdown voltages of the devices, the amplifier employs a stacked topology, which enables higher output powers and efficiency. The stacked transistors are also pulse injected to further increase the efficiency. Measurement results shows a peak PAE of 46%, peak drain efficiency (DE) of 71% and a saturated output power of 19 dBm. The implemented CMCD PA reports the best performance in literature compared to other CMOS based CMCD PAs.

KW - Current mode class-D

KW - FDSOI CMOS

KW - high efficiency

KW - power added efficiency (PAE)

KW - power amplifier (PA)

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A 28-GHz cascode inverse class-D power amplifier utilizing pulse injection in 22-nm FDSOI

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