A 230 μW built-in on-chip auto-calibrating RF amplitude detector in 65 nm CMOS

In this paper, a built-in-self-calibration RF amplitude detector circuit in 65 nm CMOS is presented. The proposed architecture makes use of two detector replicas with a feedback control system to perform the self-calibration. The system is capable of detecting RF peak amplitudes range of 0–0.6 V_p with a conversion gain of − 3 V/V. The proposed system has a wide dynamic range that can auto-corrects the RF detector to less than 10% across process and temperature variations. This architecture is implemented in standard 65 nm 1P7 M CMOS process. Comprehensive silicon measurement results show that the self-calibration structure improves the detection error of the non-calibrated RF amplitude detector by a maximum of 71% at only 230 μW overall power consumption. The proposed system can be used to calibrate the variations in circuits within an RF transceiver such as LNA, Mixers, oscillators etc.