A 1:4 Active power divider for 5G phased-array transmitters in 22nm CMOS FDSOI

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2 Scopus citations

Abstract

A CMOS broadband 1:4 active power divider is proposed in this paper. The power splitter can be used in Phased Array Transceivers at the Transmitter side. It is based on a cascode 1:4 current splitter and transmission lines. Compared to other passive power dividers and active power dividers, the proposed design exhibits 1-2 dB power gain and smaller area. The measured input 1dB compression point is 6 dB whereas the IIP3 is 7.2 dBm. The Noise Figure of the Power Divider is 10 dB at lower frequencies and 15 dB at 28 GHz. The measured results are performed across several chips. Realized in 22nm CMOS FDSOI from GF, the total power consumption is 29 mW from a 1 V power supply and the area occupied by the divider is 700µm x 600µm. A thorough analysis of the gain and noise of the divider is presented as well.

Original languageBritish English
Title of host publication2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728192017
DOIs
StatePublished - 2021
Event53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Daegu, Korea, Republic of
Duration: 22 May 202128 May 2021

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2021-May
ISSN (Print)0271-4310

Conference

Conference53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021
Country/TerritoryKorea, Republic of
CityDaegu
Period22/05/2128/05/21

Keywords

  • 5G
  • CMOS FDSOI
  • Phased array transmitters
  • Power divider

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