A 1.2V receiver front-end for multi-standard wireless applications in 65 nm CMOS LP

M. Vidojkovic; M. A.T. Sanduleanu; V. Vidojkovic; J. Van Der Tang; P. Baltus; A. H.M. Van Roermund

doi:10.1109/ESSCIRC.2008.4681880

A 1.2V receiver front-end for multi-standard wireless applications in 65 nm CMOS LP

M. Vidojkovic, M. A.T. Sanduleanu, V. Vidojkovic, J. Van Der Tang, P. Baltus, A. H.M. Van Roermund

Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Scopus citations

Abstract

A low-power low-voltage wide-band inductor-less multi-standard receiver RF front-end in a digital CMOS 65nm Low Power (LP) process is described. S11 less than -10 dB is measured in the frequency range from 10MHz up to 5GHz. The front-end featuring two gain modes, achieves a voltage gain of 29dB in the high voltage gain mode, and a voltage gain of 23dB in the low voltage gain mode. The 3dB bandwidth of the RF front-end is 2.5GHz. The measured NF at 1GHz is 5.5dB in the high gain mode and 7.7dB in the low gain mode. The front-end achieves an IIP3 of -13.5dBm and -7.5dBm in the high and the low gain mode, respectively. It consumes 13 mA from a 1.2V supply in both gain modes. The implemented front-end occupies a chip area of 670um x 860)um.

Original language	British English
Title of host publication	ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference
Pages	414-417
Number of pages	4
DOIs	https://doi.org/10.1109/ESSCIRC.2008.4681880
State	Published - 2008
Event	34th European Solid-State Circuits Conference, ESSCIRC 2008 - Edinburgh, Scotland, United Kingdom Duration: 15 Sep 2008 → 19 Sep 2008

Publication series

Name	ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference

Conference

Conference	34th European Solid-State Circuits Conference, ESSCIRC 2008
Country/Territory	United Kingdom
City	Edinburgh, Scotland
Period	15/09/08 → 19/09/08

Access to Document

10.1109/ESSCIRC.2008.4681880

Cite this

Vidojkovic, M., Sanduleanu, M. A. T., Vidojkovic, V., Van Der Tang, J., Baltus, P., & Van Roermund, A. H. M. (2008). A 1.2V receiver front-end for multi-standard wireless applications in 65 nm CMOS LP. In ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference (pp. 414-417). Article 4681880 (ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference). https://doi.org/10.1109/ESSCIRC.2008.4681880

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title = "A 1.2V receiver front-end for multi-standard wireless applications in 65 nm CMOS LP",

abstract = "A low-power low-voltage wide-band inductor-less multi-standard receiver RF front-end in a digital CMOS 65nm Low Power (LP) process is described. S11 less than -10 dB is measured in the frequency range from 10MHz up to 5GHz. The front-end featuring two gain modes, achieves a voltage gain of 29dB in the high voltage gain mode, and a voltage gain of 23dB in the low voltage gain mode. The 3dB bandwidth of the RF front-end is 2.5GHz. The measured NF at 1GHz is 5.5dB in the high gain mode and 7.7dB in the low gain mode. The front-end achieves an IIP3 of -13.5dBm and -7.5dBm in the high and the low gain mode, respectively. It consumes 13 mA from a 1.2V supply in both gain modes. The implemented front-end occupies a chip area of 670um x 860)um.",

author = "M. Vidojkovic and Sanduleanu, {M. A.T.} and V. Vidojkovic and {Van Der Tang}, J. and P. Baltus and {Van Roermund}, {A. H.M.}",

year = "2008",

doi = "10.1109/ESSCIRC.2008.4681880",

language = "British English",

isbn = "9781424423620",

series = "ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference",

pages = "414--417",

booktitle = "ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference",

note = "34th European Solid-State Circuits Conference, ESSCIRC 2008 ; Conference date: 15-09-2008 Through 19-09-2008",

}

Vidojkovic, M, Sanduleanu, MAT, Vidojkovic, V, Van Der Tang, J, Baltus, P & Van Roermund, AHM 2008, A 1.2V receiver front-end for multi-standard wireless applications in 65 nm CMOS LP. in ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference., 4681880, ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference, pp. 414-417, 34th European Solid-State Circuits Conference, ESSCIRC 2008, Edinburgh, Scotland, United Kingdom, 15/09/08. https://doi.org/10.1109/ESSCIRC.2008.4681880

A 1.2V receiver front-end for multi-standard wireless applications in 65 nm CMOS LP. / Vidojkovic, M.; Sanduleanu, M. A.T.; Vidojkovic, V. et al.
ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference. 2008. p. 414-417 4681880 (ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Sanduleanu, M. A.T.

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AU - Van Der Tang, J.

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AB - A low-power low-voltage wide-band inductor-less multi-standard receiver RF front-end in a digital CMOS 65nm Low Power (LP) process is described. S11 less than -10 dB is measured in the frequency range from 10MHz up to 5GHz. The front-end featuring two gain modes, achieves a voltage gain of 29dB in the high voltage gain mode, and a voltage gain of 23dB in the low voltage gain mode. The 3dB bandwidth of the RF front-end is 2.5GHz. The measured NF at 1GHz is 5.5dB in the high gain mode and 7.7dB in the low gain mode. The front-end achieves an IIP3 of -13.5dBm and -7.5dBm in the high and the low gain mode, respectively. It consumes 13 mA from a 1.2V supply in both gain modes. The implemented front-end occupies a chip area of 670um x 860)um.

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ER -

Vidojkovic M, Sanduleanu MAT, Vidojkovic V, Van Der Tang J, Baltus P, Van Roermund AHM. A 1.2V receiver front-end for multi-standard wireless applications in 65 nm CMOS LP. In ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference. 2008. p. 414-417. 4681880. (ESSCIRC 2008 - Proceedings of the 34th European Solid-State Circuits Conference). doi: 10.1109/ESSCIRC.2008.4681880

A 1.2V receiver front-end for multi-standard wireless applications in 65 nm CMOS LP

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