A 0.7-1.5GHz tunable papoulis all-pole low-pass filter in 22nm CMOS FDSOI

Dan Cracan, Mizan Abraha Gebremicheal, Mihai Sanduleanu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

A tunable 10-stage all-pole (Papoulis) low-pass filter occupying 0.1815mm2 is designed and integrated as a building block in a 22nm CMOS FDSOI receiver for the 5G. Each filter stage comprises of a two-stage unity gain buffer with common mode feedback loop. Tunable resistors between each stage determine the bandwidth of the filter in the range of 0.7 GHz to 1.5 GHz. An identical filter structure, but with the outputs fed back to the inputs functions as an oscillator. Correlating the oscillation frequency with the filter bandwidth, under the same tuning conditions, the filter bandwidth can be calibrated to account for PVT variations. Measurement results show an in-band OIP3 of 8.8dBm and a nearly linear phase response at a power consumption of 35mW to 50mW from a 1V supply. The power/pole of 3.3mW/GHz is the best when compared to other filters from literature.

Original languageBritish English
Title of host publication2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728192017
DOIs
StatePublished - 2021
Event53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Daegu, Korea, Republic of
Duration: 22 May 202128 May 2021

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2021-May
ISSN (Print)0271-4310

Conference

Conference53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021
Country/TerritoryKorea, Republic of
CityDaegu
Period22/05/2128/05/21

Keywords

  • All pole filter
  • CMOS FDSOI
  • Low-pass filter
  • Papoulis filters

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