@inproceedings{4ab79fa6ddea4d888a8136326d01715d,
title = "3.125GS/s, 4.9 ENOB, 109 fJ/Conversion Time-Domain ADC for Backplane Interconnect",
abstract = "This paper presents a flash Time Domain ADC with T/H amplifier, Voltage Controlled Delay Line and Time to Digital Converter. The design is operating at 3.125 GS/s with 4.9 ENOB and a Walden figure of merit of 109 fJ/Conversion. Automatic calibration means are provided as well. For measurements purposes, an integrated memory is provided. It consumes 16.2 mW from a 1 V supply. It was realized in the 45 nm PDSOI from Global Foundries.",
keywords = "Backplane interconnect, Gigabit Radio, mm-Waves, Sampler, Time-Domain ADC, Track and Hold",
author = "Serunjogi, \{Solomon Micheal\} and Mihai Sanduleanu",
note = "Publisher Copyright: {\textcopyright} IFIP International Federation for Information Processing 2024.; 31st IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration - System on a Chip, VLSI-SoC 2023 ; Conference date: 16-10-2023 Through 18-10-2023",
year = "2024",
doi = "10.1007/978-3-031-70947-0\_12",
language = "British English",
isbn = "9783031709463",
series = "IFIP Advances in Information and Communication Technology",
publisher = "Springer Science and Business Media Deutschland GmbH",
pages = "237--248",
editor = "Elfadel, \{Ibrahim (Abe) M.\} and Lutfi Albasha",
booktitle = "VLSI-SoC 2023",
address = "Germany",
}