31-34GHz low noise amplifier with on-chip microstrip lines and inter-stage matching in 90-nm baseline CMOS

Mihai A.T. Sanduleanu, Zhang Gang, John R. Long

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

31 Scopus citations

Abstract

A Ka band low-noise amplifier in a 90-nm bulk CMOS technology is presented. A thin-film microstrip line with ground sidewalls is used for signal distribution, matching and load resonators. The low-noise amplifier comprises two identical cascode stages, with inter-stage matching as gain boosting. The gain boosting circuit improves the gain by 20% and the noise performance by 27% of the cascode LNA. The proposed amplifier achieves a peak powergain of 19dB with a 3-dB bandwidth of 31 to 34GHz and a noise figure of 3dB in the middle of the band. No extra process options like MIM capacitors or thick oxide devices are used. The die size is 933 μm by 918 μm and the power consumption is 10mW from a 1.2V (±10%) power supply.

Original languageBritish English
Title of host publication2006 IEEE Radio Frequency Integrated Circuits(RFIC) Symposium - Digest of Papers
Pages121-124
Number of pages4
StatePublished - 2006
Event2006 IEEE Radio Frequency Integrated Circuits Symposium - San Francisco, CA, United States
Duration: 11 Jun 200613 Jun 2006

Publication series

NameDigest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
Volume2006
ISSN (Print)1529-2517

Conference

Conference2006 IEEE Radio Frequency Integrated Circuits Symposium
Country/TerritoryUnited States
CitySan Francisco, CA
Period11/06/0613/06/06

Keywords

  • CMOS
  • Gain boosting
  • Low noise amplifiers
  • Microstrip lines
  • Millimeter-waves

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