2-nm laser-synthesized Si nanoparticles for low-power charge trapping memory devices

Nazek El-Atab, Ayse Ozcan, Sabri Alkis, Ali K. Okyay, Ammar Nayfeh

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

10 Scopus citations

Abstract

In this work, the effect of embedding Silicon Nanoparticles (Si-NPs) in ZnO based charge trapping memory devices is studied. Si-NPs are fabricated by laser ablation of a silicon wafer in deionized water followed by sonication and filtration. The active layer of the memory was deposited by Atomic Layer Deposition (ALD) and spin coating technique was used to deliver the Si-NPs across the sample. The nanoparticles provided a good retention of charges (>10 years) in the memory cells and allowed for a large threshold voltage (Vt) shift (3.4 V) at reduced programming voltages (1 V). The addition of ZnO to the charge trapping media enhanced the electric field across the tunnel oxide and allowed for larger memory window at lower operating voltages.

Original languageBritish English
Title of host publicationProceedings of the IEEE Conference on Nanotechnology
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages505-509
Number of pages5
ISBN (Electronic)9781479956227
DOIs
StatePublished - 26 Nov 2014
Event2014 14th IEEE International Conference on Nanotechnology, IEEE-NANO 2014 - Toronto, Canada
Duration: 18 Aug 201421 Aug 2014

Publication series

NameProceedings of the IEEE Conference on Nanotechnology
ISSN (Electronic)1944-9399

Conference

Conference2014 14th IEEE International Conference on Nanotechnology, IEEE-NANO 2014
Country/TerritoryCanada
CityToronto
Period18/08/1421/08/14

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